MT48LC128M4A2TG MICRON [Micron Technology], MT48LC128M4A2TG Datasheet - Page 54

• Manufacturer Part Number: MT48LC128M4A2TG
• Description: SYNCHRONOUS DRAM
• Manufacturer: MICRON [Micron Technology]

TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4.
512Mb: x4, x8, x16 SDRAM
512MSDRAM_D.p65 – Rev. D; Pub 1/02
A0-A9, A11, A12
DQML, DQMH
SYMBOL*
t
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
CKH
COMMAND
BA0, BA1
2. x16: A11 and A12 = “Don’t Care”
DQM/
CLK
CKE
A10
DQ
x8: A12 = “Don’t Care”
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
t CKH
t CMH
t AH
t AH
t AH
MIN
0.8
1.5
2.5
2.5
7.5
0.8
7
-7E
t RCD
t CK
MAX
T1
NOP
MIN
DISABLE AUTO PRECHARGE
0.8
1.5
2.5
2.5
7.5
0.8
ENABLE AUTO PRECHARGE
10
t CMS
t CL
-75
WRITE – DQM OPERATION
COLUMN m 2
t DS
MAX
WRITE
T2
BANK
D
IN
t CMH
t DH
m
t CH
UNITS
ns
ns
ns
ns
ns
ns
ns
T3
NOP
54
SYMBOL*
t
t
t
t
t
t
CKS
CMH
CMS
DH
DS
RCD
t DS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
T4
IN
NOP
m + 2
t DH
1
t DS
D
T5
IN
NOP
m + 3
t DH
512Mb: x4, x8, x16
MIN
1.5
0.8
1.5
0.8
1.5
15
-7E
MAX
NOP
T6
MIN
1.5
0.8
1.5
0.8
1.5
20
©2000, Micron Technology, Inc.
-75
SDRAM
ADVANCE
MAX
NOP
DON’T CARE
T7
UNITS
ns
ns
ns
ns
ns
ns