MT48LC128M4A2TG MICRON [Micron Technology], MT48LC128M4A2TG Datasheet - Page 38

• Manufacturer Part Number: MT48LC128M4A2TG
• Description: SYNCHRONOUS DRAM
• Manufacturer: MICRON [Micron Technology]

TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 2, the CAS latency = 3, and AUTO PRECHARGE is disabled.
512Mb: x4, x8, x16 SDRAM
512MSDRAM_D.p65 – Rev. D; Pub 1/02
A0-A9, A11, A12
DQML, DQMH
SYMBOL*
t
t
t
t
t
t
t
t
t
AC (3)
AC (2)
AH
AS
CH
CL
CK (3)
CK (2)
CKH
COMMAND
BA0, BA1
DQM/
2. x16: A11 and A12 = “Don’t Care”
CKE
A10
CLK
DQ
x8: A12 = “Don’t Care”
t CMS
t CKS
t AS
t AS
t AS
COLUMN m
READ
T0
BANK
t CMH
t CKH
t AH
t AH
t AH
2
t CMS
t CK
MIN
0.8
1.5
2.5
2.5
7.5
0.8
7
T1
NOP
-7E
t CMH
MAX
5.4
5.4
t CL
t CKS t CKH
T2
MIN
NOP
0.8
1.5
2.5
2.5
7.5
0.8
10
t LZ
t CH
t AC
-75
CLOCK SUSPEND MODE
MAX
5.4
6
T3
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
D
OUT
m
T4
38
NOP
t OH
t AC
SYMBOL*
t
t
t
t
t
t
t
t
t
CKS
CMH
CMS
DH
DS
HZ (3)
HZ (2)
LZ
OH
D
T5
OUT
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
m + 1
t HZ
1
T6
NOP
512Mb: x4, x8, x16
MIN
1.5
0.8
1.5
0.8
1.5
2.7
COLUMN e 2
t DS
1
BANK
WRITE
D
T7
-7E
OUT
t DH
e
MAX
5.4
5.4
MIN
1.5
0.8
1.5
0.8
1.5
2.7
T8
1
©2000, Micron Technology, Inc.
-75
SDRAM
ADVANCE
MAX
5.4
6
D
DON’T CARE
OUT
T9
NOP
UNITS
e + 1
ns
ns
ns
ns
ns
ns
ns
ns
ns