MT48LC128M4A2TG MICRON [Micron Technology], MT48LC128M4A2TG Datasheet - Page 53

• Manufacturer Part Number: MT48LC128M4A2TG
• Description: SYNCHRONOUS DRAM
• Manufacturer: MICRON [Micron Technology]

TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. x16: A11 and A12 = “Don’t Care”
512Mb: x4, x8, x16 SDRAM
512MSDRAM_D.p65 – Rev. D; Pub 1/02
A0-A9, A11, A12
DQML, DQMH
SYMBOL*
t
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
CKH
COMMAND
BA0, BA1
DQM/
2.
3. Page left open; no
CKE
CLK
A10
DQ
t
WR must be satisfied prior to PRECHARGE command.
x8: A12 = “Don’t Care”
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
BANK
T0
ROW
ROW
t CKH
t CMH
t AH
t AH
t AH
MIN
t RCD
0.8
1.5
2.5
2.5
7.5
0.8
7
t CL
-7E
t
RP.
MAX
T1
NOP
t CH
MIN
0.8
1.5
2.5
2.5
7.5
0.8
10
t CMS
t CK
t DS
COLUMN
-75
WRITE – FULL-PAGE BURST
T2
WRITE
BANK
D
MAX
IN
t CMH
t DH
m
m
1
UNITS
ns
ns
ns
ns
ns
ns
ns
t DS
D
IN
T3
NOP
m + 1
t DH
53
1,024 (x16) locations within same row
2,048 (x8) locations within same row
4,096 (x4) locations within same row
t DS
SYMBOL*
t
t
t
t
t
t
CKS
CMH
CMS
DH
DS
RCD
D
IN
T4
NOP
m + 2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DH
Full page completed
t DS
D
IN
T5
NOP
m + 3
t DH
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
)
)
)
)
)
(
(
(
)
(
(
(
(
(
(
)
(
)
512Mb: x4, x8, x16
)
(
)
(
)
(
)
(
)
(
)
)
)
(
)
)
)
)
)
MIN
(
)
(
)
(
)
(
)
(
)
)
1.5
0.8
1.5
0.8
1.5
15
t DS
D
-7E
Tn + 1
IN
NOP
m - 1
MAX
t DH
Full-page burst does
not self-terminate.
Can use BURST TERMINATE
command to stop.
MIN
1.5
0.8
1.5
0.8
1.5
20
BURST TERM
©2000, Micron Technology, Inc.
Tn + 2
-75
SDRAM
ADVANCE
MAX
2, 3
DON’T CARE
UNITS
ns
ns
ns
ns
ns
ns
Tn + 3
NOP