MT48LC128M4A2TG MICRON [Micron Technology], MT48LC128M4A2TG Datasheet - Page 23

• Manufacturer Part Number: MT48LC128M4A2TG
• Description: SYNCHRONOUS DRAM
• Manufacturer: MICRON [Micron Technology]

PRECHARGE command is that it can be used to truncate
fixed-length or full-page bursts.
cated with the BURST TERMINATE command. When
truncating a WRITE burst, the input data applied coinci-
dent with the BURST TERMINATE command will be
ignored. The last data written (provided that DQM is
LOW at that time) will be the input data applied one clock
previous to the BURST TERMINATE command. This is
512Mb: x4, x8, x16 SDRAM
512MSDRAM_D.p65 – Rev. D; Pub 1/02
Fixed-length or full-page WRITE bursts can be trun-
A0-A9, A11, A12
COMMAND
ADDRESS
Terminating a WRITE Burst
BA0, BA1
NOTE: DQMs are LOW.
PRECHARGE Command
CLK
RAS#
CAS#
DQ
WE#
CKE
CLK
A10
CS#
HIGH
BANK,
WRITE
COL n
Figure 19
Figure 20
D
T0
n
IN
TERMINATE
BURST
Bank Selected
T1
All Banks
ADDRESS
BANK
COMMAND
(ADDRESS)
(DATA)
T2
NEXT
23
shown in Figure 19, where data n is the last desired data
element of a longer burst.
PRECHARGE
deactivate the open row in a particular bank or the open
row in all banks. The bank(s) will be available for a subse-
quent row access some specified time (
precharge command is issued. Input A10 determines
whether one or all banks are to be precharged, and in the
case where only one bank is to be precharged, inputs
BA0, BA1 select the bank. When all banks are to be
precharged, inputs BA0, BA1 are treated as “Don’t Care.”
Once a bank has been precharged, it is in the idle state
and must be activated prior to any READ or WRITE com-
mands being issued to that bank.
POWER-DOWN
dent with a NOP or COMMAND INHIBIT when no ac-
cesses are in progress. If power-down occurs when all
banks are idle, this mode is referred to as precharge
power-down; if power-down occurs when there is a row
active in any bank, this mode is referred to as active
power-down. Entering power-down deactivates the in-
put and output buffers, excluding CKE, for maximum
power savings while in standby. The device may not
remain in the power-down state longer than the refresh
period (64ms) since no refresh operations are performed
in this mode.
or COMMAND INHIBIT and CKE HIGH at the desired
clock edge (meeting
COMMAND
CKE
CLK
All banks idle
The PRECHARGE command (see Figure 20) is used to
Power-down occurs if CKE is registered low coinci-
The power-down state is exited by registering a NOP
Enter power-down mode.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CKS
NOP
Input buffers gated off
Power-Down
t
CKS). (See Figure 21.)
Figure 21
512Mb: x4, x8, x16
(
(
(
(
)
)
(
)
)
)
(
(
(
(
)
(
)
)
)
)
Exit power-down mode.
> t CKS
©2000, Micron Technology, Inc.
NOP
SDRAM
ADVANCE
t
RP) after the
DON’T CARE
ACTIVE
t RCD
t RAS
t RC