MT48LC128M4A2TG MICRON [Micron Technology], MT48LC128M4A2TG Datasheet - Page 30

• Manufacturer Part Number: MT48LC128M4A2TG
• Description: SYNCHRONOUS DRAM
• Manufacturer: MICRON [Micron Technology]

TRUTH TABLE 4 – CURRENT STATE BANK n - COMMAND TO BANK m
(Notes: 1-6; notes appear below and on next page)
NOTE: 1. This table applies when CKE
512Mb: x4, x8, x16 SDRAM
512MSDRAM_D.p65 – Rev. D; Pub 1/02
CURRENT STATE CS# RAS# CAS# WE#
Precharging
(With Auto
(With Auto
Activating,
Precharge)
Precharge)
Precharge
Precharge
Disabled)
Disabled)
Active, or
(Auto
(Auto
Write
Write
Read
Read
Row
Any
Idle
2. This table describes alternate bank operation, except where noted; i.e., the current state is for bank n and the
3. Current state definitions:
previous state was self refresh).
commands shown are those allowed to be issued to bank m (assuming that bank m is in such a state that the given
command is allowable). Exceptions are covered in the notes below.
Write w/Auto
Read w/Auto
Row Active: A row in the bank has been activated, and
Precharge
Precharge
Enabled: Starts with registration of a READ command with auto precharge enabled, and ends when
Enabled: Starts with registration of a WRITE command with auto precharge enabled, and ends when
Write: A WRITE burst has been initiated, with auto precharge disabled, and has not yet terminated or been
Read: A READ burst has been initiated, with auto precharge disabled, and has not yet terminated or been
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Idle: The bank has been precharged, and
H
H
H
H
H
H
H
register accesses are in progress.
terminated.
terminated.
been met. Once
been met. Once
X
X
H
H
H
H
L
L
L
L
L
L
L
L
L
L
X
H
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
n-1
H
H
H
H
H
H
H
H
H
H
H
was HIGH and CKE
X
X
L
L
L
L
L
L
L
L
L
L
t
t
RP is met, the bank will be in the idle state.
RP is met, the bank will be in the idle state.
COMMAND (ACTION)
READ (Select column and start READ burst)
PRECHARGE
READ (Select column and start new READ burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
PRECHARGE
READ (Select column and start new READ burst)
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
COMMAND INHIBIT (NOP/Continue previous operation)
NO OPERATION (NOP/Continue previous operation)
Any Command Otherwise Allowed to Bank m
ACTIVE (Select and activate row)
WRITE (Select column and start WRITE burst)
ACTIVE (Select and activate row)
WRITE (Select column and start WRITE burst)
WRITE (Select column and start new WRITE burst)
ACTIVE (Select and activate row)
WRITE (Select column and start WRITE burst)
PRECHARGE
WRITE (Select column and start new WRITE burst)
PRECHARGE
n
is HIGH (see Truth Table 2) and after
30
t
RP has been met.
t
RCD has been met. No data bursts/accesses and no
Micron Technology, Inc., reserves the right to change products or specifications without notice.
512Mb: x4, x8, x16
t
XSR has been met (if the
©2000, Micron Technology, Inc.
SDRAM
ADVANCE
t
RP has
t
NOTES
7, 8, 14
7, 8, 15
7, 8, 16
7, 8, 17
RP has
7, 10
7, 11
7, 12
7, 13
7
7
9
9
9
9