cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 94
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cx29503
Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29503.pdf
(388 pages)
- Current page: 94 of 388
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Functional Description
2.10.6
2.10.6.1
Figure 2-17. Framing Strobe TSB_STB Relation to Time Slot N
2-46
TSB_RDAT
TSB_TDAT
TSB_CLK
TSB_STB
TSB_STB
TSB_CLK
Timing Details
Time Slot 1 occurs at the
same location for receive
Payload Bus, AC Characteristics
The CX29503 operates as the master of the TSB and the external device (e.g, the
HDLC Controller) responds as a slave. The CX29503 generates TSB clocks and
control signals and the external device responds by transmitting TSB data to or
receiving TSB data from the CX29503.
The CX29503 generates a TSB frame strobe (TSB_STB) on the rising edge of
TSB_CLK as seen in
of an 84 time slot frame carrying payload data.
The TSB exchanges data over 2 I/O chip boundaries so care must be taken in ensuring
that the data is enxchanged on the right phase of the master TSB clock, TSB_CLK. A
possible solution for ensuring correct data exchange is for the slave (external device)
to transmit data on the rising edge of TSB_CLK, and sample the received data on the
falling edge of TSB_CLK.
There is only 1 Time Slot Frame strobe used (TSB_STB) for transmit and receive
directions. There is also only 1 clock (TSB_CLK) used in the definition of bit
boundaries for transmit and receive directions. This results in the Time Slot Frame
alignment of the receive and transmit payload. See
TSB consists of 8 serial data bits. The first bit (the MSB) shifted into a time slot is the
first bit transmitted.
TS #84
TS #84
and transmit data
TS #1
TS #1
Mindspeed Technologies™
TS #2
TS #2
TS #3
TS #3
Preliminary Information
Figure
TS #4
TS #4
2-17. The TSB frame strobe TSB_STB indicates the start
TS #5
TS #5
Figure
TS #1
TS #1
2-17. Each time slot in the
TS #2
TS #2
TS #3
TS #3
CX29503 Data Sheet
29503-DSH-002-B
100702_025
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