cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 342
cx29503
Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29503.pdf
(388 pages)
- Current page: 342 of 388
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Register Description
8.6.2
0x80—VT#n Receive Control (RXVTCTL)
Reset State
ProvSL-V[2:0]
Unused
DrpK4
0x82—VT#n Receive Signal Label Status (RXVTLAB)
Reset State
RxVTLab [2:0]
0x83—VT#n Receive J2 Trace Circular Buffer Address (RXJ2ADD
Reset State
RxJ2 [3:0]
0x84—VT#n Receive J2 Trace Circular Buffer Data (RXJ2DAT)
Reset State
RxJ2 [7:0]
8-212
RxJ2 [7]
—
—
—
7
7
7
7
0x00
Provisioned VT signal label value, which is compared to the received VT signal label to
determine UNEQ-V and PLM-V error conditions.
This bit is implemented but not defined.
The K4 byte is passed to the TSB.
0x00
The Signal Label field of the V5 byte—Current State
0x00
Receive VT trace circular buffer. This register is the read location for access into a 16-byte
circular buffer used for VT trace messages received in the J2 byte.
0x00
Receive VT trace circular buffer. This register is the read location for access into a 16-byte
circular buffer used for VT trace messages received in the J2 byte.
RxJ2 [6]
Receive Tributary Processing
—
—
—
6
6
6
6
RxJ2 [5]
—
—
—
5
5
5
5
Mindspeed Technologies™
RxJ2 [4]
Preliminary Information
DrpK4
—
—
4
4
4
4
RxJ2 [3]
RxJ2 [3]
Unused
—
3
3
3
3
ProvSL-V[2]
RxVTLab [2]
RxJ2 [2]
RxJ2 [2]
2
2
2
2
ProvSL-V[1]
RxVTLab [1]
RxJ2 [1]
RxJ2 [1]
1
1
1
1
CX29503 Data Sheet
29503-DSH-002-B
ProvSL-V[0]
RxVTLab [0]
RxJ2 [0]
RxJ2 [0]
0
0
0
0
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