cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 239

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

CX29503 Data Sheet
8.4.2
The D3/E3 framer block is derived from Mindspeed’s CX28342/3/4/6/8 device. Effort was made to maintain
software compatibility with this device. Unlike the CX28342/3/4/6/8, the CX29503 does not support E3-G.832
framing.
0x5220—Mode Control Register
Default after reset:
Direction:
Modification:
LineLp
SourceLp
TxAlm1,0
29503-DSH-002-B
LineLp
7
SourceLp
00(h)
Read/Write
Bits 4–7, dynamic; bits 0–1, static
Shallow Line Loopback Enable—Set to enable the loopback in the external direction (back to
the network). This loopback connects the received data stream before B3ZS/HDB3 decoding
to the transmitter. All data and overhead bits are looped, and Bipolar Code Violations (BPVs)
are fully preserved per ANSI standard T1.404. The received data is presented to all receiver
blocks and is present on the receiver output to either the SONET block or the serial pins.
is internally synchronized. Because activation/deactivation of a loopback causes internal
circuits to switch between clocks, after writing to this bit, the microprocessor should not access
any of the device registers (read or write) for the 20 slowest clock cycles.
Source Loopback Enable—Set to enable the loopback in the internal direction. This loopback
connects the encoded transmitter data and clock directly to the receiver B3ZS/HDB3 decoder.
Transmission of data on the line is not affected by this loopback.
is internally synchronized. Because activation/deactivation of a loopback causes internal
circuits to switch between clocks, after writing to this bit, the microprocessor should not access
any of the device registers (read or write) for the 20 slowest clock cycles.
Transmit Alarm Control—Used to control transmission of various alarm signals. In DS3
mode, AIS, idle, and yellow alarm signals on the outgoing DS3 stream are controlled as
follows:
DS3/E3 Framer Registers
A dynamic change of this bit can cause loss of data for a few clock cycles, until the channel
A dynamic change of this bit can cause loss of data for a few clock cycles, until the channel
6
Table 8-43. Transmit Alarm Controls
In E3-G.751 mode, the TxAlm0 bit is set high to transmit the E3 AIS signal. The
TxAlm1 bit is set high to transmit the E3 yellow alarm (A-bit or RDI bit high).
TxAlm0 bit has precedence in E3 mode.
TxAlm1
TxAlm1
0
0
1
1
5
Mindspeed Technologies™
TxAlm0
TxAlm0
Preliminary Information
0
1
0
1
4
Normal, no alarms transmitted
Yellow Alarm (X-bits low) transmitted
Idle Code transmitted
AIS transmitted
Reserved
3
Reserved
2
Alarm Action
E3Frm
1
Register Description
CbitP/832
0
8
-
109