cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 241

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

CX29503 Data Sheet
0x5222—Alarm Start Interrupt Enable Register
Writing a 1 to an IER bit allows that specific interrupt source to activate its respective ISR bit in the Alarm Start
Interrupt Status Register [addr: 243], set the appropriate bit in the Interrupt Request Register [addr: 241], and
report the interrupt to the Global Control and Status Block. If cleared, each IER bit allows that source to activate
its respective ISR bit, but prevents activation of the IRR bit and reporting the interrupt to the Global Control and
Status Block.
Default after reset:
Direction:
Modification:
SEFStrtIE
LOSStrtIE
IdleStrtIE
YelStrtIE
AISStrtIE
OOFStrtIE
29503-DSH-002-B
Reserved
7
Reserved
00(h)
Read/Write
Dynamic
Enable SEF Start Interrupt in DS3 mode. This bit has no effect in the E3-G.751 mode.
Enable LOS Start Interrupt in all modes.
Enable Idle Start Interrupt in DS3 mode. This bit has no effect in the E3-G.751 mode.
Enable Yellow Alarm Start Interrupt in all modes.
Enable AIS Start Interrupt in all modes.
Enable OOF Start Interrupt in all modes.
6
NOTE:
SEFStrtIE
5
Mindspeed Technologies™
Reserved bits in the Enable and Control registers must be set to 0.
LOSStrtIE
Preliminary Information
4
IdleStrtIE
3
YelStrtIE
2
AISStrtIE
1
Register Description
OOFStrtIE
0
8
-
111