cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 220

• Manufacturer Part Number: cx29503
• Description: Cx29503 Broadband Access Multiplexer Data Sheet
• Manufacturer: Mindspeed Technologies

Register Description
Table 8-39. DS3/E3 Framer Register Map <tableContinuation>(2 of 3)
8-90
Offset
5253–
(Hex)
524A
524B
524C
524D
526A
526B
526C
526D
5247
5248
5249
524E
524F
5250
5251
5252
525F
5260
5261
5262
5263
5264
5265
5266
5267
5268
5269
526E
526F
5270
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—
R
R
R
R
R
R
R
R
Transmit Data Link and FEAC Interrupt Status Register
Reserved
Reserved
Receive Data Link Interrupt Status Register
Receive Data Link Message Byte
Reserved
Reserved
Receive FEAC Byte
Receive FEAC Stack Byte
Receive FEAC Interrupt Status Register
DS3/E3 Parity Error Counter—High Byte
DS3/E3 FEBE Event Counter—High Byte
DS3/E3 Excessive 0s Counter—Low Byte
DS3/E3 Excessive 0s Counter—High Byte
DS3/E3 LCV Counter—Middle Byte
E3-G.832 SSM Field Status Register (not supported)
Receive AIC Byte
Undefined
DS3/E3 Parity Error Counter—Low Byte
DS3 Parity Disagreement Counter—Low Byte
DS3 Parity Disagreement Counter—High Byte
DS3 X-Bit Disagreement Counter—Low Byte
DS3 X-Bit Disagreement Counter—High Byte
DS3/E3 Frame Error Counter—Low Byte
DS3/E3 Frame Error Counter—High Byte
DS3 Path Parity Error Counter—Low Byte
DS3 Path Parity Error Counter—High Byte
DS3/E3 FEBE Event Counter—Low Byte
DS3/E3 LCV Counter—Low Byte
DS3/E3 LCV Counter—High Byte
DS3/E3 Framer Registers
Register Description
Mindspeed Technologies™
Preliminary Information
(Section
8.4.2)
Partial
Partial
Partial
Clear
Read
on
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
—
—
—
—
—
—
bits 1–4, 6, and 7 = 0
(Hex or Undefined)
bits 0, 5 = undefined
bits 2–7 = undefined
Value After Reset
bits 0 and 1 = 0
CX29503 Data Sheet
0x03
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
29503-DSH-002-B
—
—
—
—
—
—
—
—
—