cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 170
cx29503
Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29503.pdf
(388 pages)
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Register Description
ACTIVE
RX/TXN
0x18—Programmable Input/Output (PIO)
This register must be written to 0x5A on initialization and maintained at that value.
0x19—Programmable Output Enable (POE)
This register must be written to 0x00 on initialization and maintained at that value.
8-40
RMSYNC_EN
(set to 0)
—
7
7
(set to 1)
Framer Active—The offline framer transitions to its ACTIVE state in response to an RFORCE
or TFORCE reframe request from the processor or in response to RLOF or TLOF reframe
request from an online framer. The offline framer remains ACTIVE until alignment is found
(FOUND), search is aborted [see RABORT, addr: 040; or TABORT, addr: 071], search
reaches its time-out interval (TIMEOUT), or all possible frame candidates are eliminated
(INVALID).
RX/TX Reframe Operation—Indicates in which direction the offline framer is actively
searching or most recently searched for frame alignment. RX/TXN status is updated when the
offline framer transitions to its ACTIVE state in response to a reframe request.
RDL_IO
—
6
6
Table 8-12. Maximum Average Reframe Time (MART) and Framer Time-Out
0 = offline framer inactive; search completed, aborted or timed-out
1 = offline framer actively searching for alignment
0 = search data from the TSB interface
1 = search data from the Receive Line Interface unit
NOTE:
Ft
SF
SF + JYEL
ESF
ESF + CRC
ESF + MIMIC
MFAS
GENERAL NOTE:
known good pseudo-random DS1 input is applied and the time that a valid DS0 signal is observed at the output.
FAS
TMSYNC_EN
(set to 0)
TDL_OE
Framer Mode
5
5
Mindspeed Technologies™
RFORCE or TFORCE do not change current RLOF or TLOF status. RFORCE or TFORCE
is cleared by a framer transition to ACTIVE.
MART is defined (per Telcordia TA-TSY-000278) as the difference between the time that a
(set to 1)
RDL_OE
TDL_IO
Preliminary Information
4
4
RFSYNC_IO
INDY_OE
(set to 1)
10.0 ms
15.0 ms
15.0 ms
10.0 ms
3.5 ms
3.5 ms
4.5 ms
0.5 ms
MART
3
3
RMSYNC_IO
TCKO_OE
(set to 0)
2
2
TIMEOUT (addr: 017)
TFSYNC_IO
(set to 1)
8 ms ± 125 µs
8 ms ± 125 µs
12 ms ± 1 bit
12 ms ± 1 bit
12 ms ± 1 bit
24 ms ± 1 bit
24 ms ± 1 bit
24 ms ± 1 bit
—
1
1
CX29503 Data Sheet
29503-DSH-002-B
TMSYNC_IO
(set to 0)
—
0
0
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