cx29503 Mindspeed Technologies, cx29503 Datasheet - Page 235
cx29503
Manufacturer Part Number
cx29503
Description
Cx29503 Broadband Access Multiplexer Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
1.CX29503.pdf
(388 pages)
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CX29503 Data Sheet
0x5009—DS2/E2 Channel 1 Framer Control Register
0x500A—DS2/E2 Channel 2 Framer Control Register
0x500B—DS2/E2 Channel 3 Framer Control Register
0x500C—DS2/E2 Channel 4 Framer Control Register
0x500D—DS2/E2 Channel 5 Framer Control Register
0x500E—DS2/E2 Channel 6 Framer Control Register
0x500F—DS2/E2 Channel 7 Framer Control Register
Reset State
DS2/E2cfgen
G747Enable
NoInvertDS1Data
0x5010—DS2/E2 Channel 1 Loopback Control Register
0x5011—DS2/E2 Channel 2 Loopback Control Register
0x5012—DS2/E2 Channel 3 Loopback Control Register
0x5013—DS2/E2 Channel 4 Loopback Control Register
0x5014—DS2/E2 Channel 5 Loopback Control Register
0x5015—DS2/E2 Channel 6 Loopback Control Register
29503-DSH-002-B
—
7
0x00
The DS2/E2 channel configuration is updated when this bit is changed from 0 to 1. Otherwise,
the DS2/E2 channel continues to operate with its previous channel configuration.
This enables G.747 multiplexing when 1 (in M13 mode only—this mode becomes effective
when the DS2/E2cfgen bit is taken from 0 to 1.)
Do not invert the second and fourth DS1 data streams when 1 (in M13 mode only, not valid for
E13 or G.747 modes—this mode becomes effective when the DS2/E2cfgen bit is taken from
0 to 1.)
—
6
—
5
Mindspeed Technologies™
Preliminary Information
—
4
—
3
NoInvertDS
1Data
2
G747 Enable
1
Register Description
DS2/E2 cfgen
0
8
-
105
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