tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 82

• Manufacturer Part Number: tmp1940cyaf
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

7.1
Port 0 (P00–P07)
address/data bus. The P0CR register controls the direction of the Port 0 pins. Upon reset, the P0CR register
bits are cleared, configuring all Port 0 pins as inputs.
register bits all cleared.
Eight Port 0 pins function as either discrete general-purpose I/O pins or the AD[0:7] bits of the
During external memory accesses, Port 0 pins are automatically configured as AD[0:7], with the P0CR
Direction Control
P0CR Write
Output Latch
P0 Write
(bitwise)
Reset
Figure 7.1 Port 0 (P00–P07)
TMP1940CYAF-40
P0 Read
Output Buffer
TMP1940CYAF
Port 0
P00–P07
(AD0–AD7)