tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 201

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tmp1940cyaf

Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
X = Don’t care,
Example: Generating a one-shot pulse with a width of 2 ms and a delay of 3 ms on assertion of an
Settings in the main routine
TB0MOD
TB0FFCR
P7CR
P7FC
IMC2HL
IMC7LL
IMC7LH
TB0RUN
Settings in INT5
TB0RG0
TB0RG1
TB0FFCR
IMC7LH
Settings in INTTB01
TB0FFCR
IMC7LH
Clocking conditions:
System clock:
High-speed clock gear:
Prescaler clock:
external trigger pulse on the TB0IN0 pin
– = No change
7
X
X
X
X
X
TB0CP0
TB0RG0
X
X
X
X
6
X
X
1
1
X
X
X
0
X
X
X
X
5
1
0
1
1
1
X
1
1
TMP1940CYAF-159
4
0
0
1
1
1
X
1
1
3ms/ T1
2ms/ T1
High-speed (fc)
fperiph/4 (fperiph = fsys)
3
1
0
0
0
0
1
0
0
0
1 (fc)
2
0
0
1
0
0
1
1
1
0
0
1
0
1
0
0
0
X
0
0
0
1
0
0
0
0
1
0
0
Places the counter in free-running mode.
Selects T1 as the counter clock source.
Latches UC0 value into TB0CP0 at rising edges of
the TB0IN0 input.
Clears TB0FF0 to 0.
Disables the toggle-trigger for TB0FF0.
Configures the P76 pin as TB1OUT.
Enables INT5 and disables INTTB00 and INTTB01.
Starts the TMRB0.
Enables the TB0FF0 toggle-trigger for TB0RG0 and
TB0RG1 matches.
Enables INTTB01.
Disables the TB0FF0 toggle-trigger for TB0RG0 and
TB0RG1 matches.
Disables INTTB01.
TMP1940CYAF

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