tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 402

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tmp1940cyaf

Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
3.5.11
Note: If the serial operation mode is determined as UART, the boot program checks if the SIO can
Note: The four high-order bits of the ACK response are the same as those of the previous
x8H (See Note)
x1H (See Note)
10H
20H
30H
Return Value
Return Value
Return Value
Acknowledge Responses
values of possible acknowledge responses to the received data. The upper four bits of the acknowledge
response are equal to those of the command being executed. Bit 3 of the code indicates a receive error.
Bit 0 indicates an invalid command error, a checksum error or a password error. Bit 1 and bit 2 are
always 0. Receive error checking is not done in I/O Interface mode.
The boot program represents processing states with specific codes. Table 3.9 to Table 3.11 show the
86H
30H
be programmed to the baud rate at which the operation mode byte was transferred. If that
baud rate is not possible, the boot program aborts, without sending back any response.
command code.
18H
11H
10H
Table 3.9 ACK Response to the Serial Operation Mode Byte
The SIO can be configured to operate in UART mode. (See Note)
The SIO can be configured to operate in I/O Interface mode.
A receive error occurred while getting a command code.
An undefined command code was received. (Reception was completed normally.)
The RAM Transfer command was received.
The Show Flash Memory Sum command was received.
The Show Product Information command was received.
A receive error occurred.
A checksum or password error occurred.
The checksum was correct.
Table 3.10 ACK Response to the Command Byte
Table 3.11 ACK Response to the Checksum Byte
TMP1940FDBF-44
Meaning
Meaning
Meaning
TMP1940FDBF

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