tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 199

• Manufacturer Part Number: tmp1940cyaf
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

X = Don’t care,
TB0RUN
TB0RG0
TB0RG1
TB0RUN
TB0FFCR
TB0MOD
P7CR
P7FC
TB0RUN
TB0RG0-WR
Figure 12.17 shows a functional diagram of 16-bit PPG mode.
The following is an example of running the timer in 16-bit PPG mode.
TB0IN0
T16
T1
T4
TB0RUN.TB0RDE
– = No change
Figure 12.17 Functional Diagram of 16-Bit PPG Mode
Selector
7
0
1
X
0
1
Selector
*
*
6
0
0
X
0
1
1
0
*
*
(**
5
X
X
0
1
X
*
*
4
X
X
0
0
X
*
*
01, 10, 11)
16-Bit Comparator
Register Buffer 0
3
1
0
*
*
TMP1940CYAF-157
TB0RG0
2
0
0
1
1
1
*
*
1
X
X
1
X
*
*
*
16-Bit Up-Counter UC0
0
0
0
0
1
*
*
*
Internal Data Bus
Match
Disables the TB0RG0 double-buffering and stops the
TMRB0.
Defines the duty cycle (16 bits).
Defines the cycle period (16 bits).
Enables the TB0RG0 double-buffering. (The duty cycle
and cycle period are changed by the INTTB01 interrupt.)
Toggles the TB0FF0 when a match is detected between
UC0 and TB0RG0 and between UC0 and TB0RG1. Initially
clears the TB0FF0 to 0.
Selects a prescaler output clock as the timer clock source
and disables the capture function.
Configures the P76 pin as TB1OUT.
Starts the TMRB0.
TB0RUN.TB0RUN
16-Bit Comparator
TB0RG1
Clear
TB0OUT (PPG output)
TMP1940CYAF
(TB0FF0)
F/F