tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 414

• Manufacturer Part Number: tmp1940cyaf
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

3.6.11
3.6.12
3.6.13
Block Protect Command
the program and erase commands on the protected blocks are summarized below.
internally latched in the seventh cycle. Then, allow an interval of 4 m to elapse before providing data
for the eighth cycle, which enables writing to the protection control circuitry. Next, allow an interval of
at least 100 m to elapse before providing data for the ninth cycle. This terminates writing to the
protection control circuitry. Finally, allow an interval of 8 m to elapse and provide data for the tenth
cycle to complete the command.
command must be written to verify the protect status after executing Block Protect. If the desired block
is not in the protected state, the Block Protect command sequence must be re-initiated. Figure 3.22
illustrates the algorithm for the Block Protect command.
terminates the block protect operation. The Block Protect command that was interrupted should be re-
initiated once the flash memory is ready to accept another command sequence.
Verify Block Protect Command
is a four-bus-cycle operation. The address of the block to be verified is given in the fourth cycle. Any
address within the block range will suffice, provided A0 = A1 = A2 = A3 = 0, A4 = 1 and A6 = 0. To
get correct data, a 32-bit read must be performed at least twice. Use the last read as valid data. If the
selected block is protected, a value of 0x0000_0001 is returned. If the selected block is not protected, a
value of 0x0000_0000 is returned. Following the fourth bus cycle, an additional block address may be
read.
Read/Reset command or a hardware reset is required to reset the flash memory to Read mode or to write
the next command.
Write Operation Status
embedded operation: DQ7, DQ5 and DQ3. These status bits can be read during an embedded operation
using the same timing as for Read mode. The flash memory automatically returns to Read mode when an
embedded operation completes.
Program command on a protected block
Block Erase command on a protected block
Chip Erase command when all the blocks are
protected
Chip Erase command when any blocks are
protected
Multi-Block Erase command when any blocks are
protected
Note that the block protect operation is not verified automatically. The Verify Block Protect
Any commands written during the Block Protect algorithm are ignored. A hardware reset immediately
The block protection feature disables both program and erase operations in any block. The effects of
The Block Protect command requires 10 bus cycles. The address of the block to be protected is
The Verify Block Protect command is used to verify the protect status of a block. Verify Block Protect
The Verify Block Protect command does not return the flash memory to Read mode. Either the
As shown in Table 3.19, the flash memory provides several flag bits to determine the status of an
Table 3.15 Effects of the Program and Erase Commands on the Protected Blocks
Command
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No programming operation is performed, and the flash
memory automatically returns to Read mode.
No erase operation is performed, and the flash memory
automatically returns to Read mode.
No erase operation is performed, and the flash memory
automatically returns to Read mode.
Only the unprotected blocks are erased. Upon completion,
the flash memory automatically returns to Read mode.
Only the unprotected blocks are erased. Upon completion,
the flash memory automatically returns to Read mode.
Operation
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