tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 63

• Manufacturer Part Number: tmp1940cyaf
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

5.4
5.5
Prescalar Clock Control Section
prescalar. The prescalar clock source ( T0) can be selected from fperiph/4, fperiph/2 and fperiph/1 through
the PRCK[1:0] bits of the SYSCR0. fperiph can be selected from either fgear or fc through the FPSEL bit of
the SYSCR1. The default reset values select fgear as fperiph, and fperiph/4 as T0.
Clock Frequency Multiplication Section (PLL)
fpll clock. At reset, the PLL is disabled. To use the PLL, the PLLOFF pin must be high when RESET is
released.
oscillator. The oscillator warm-up period (WUP) timer is also used as the PLL lock timer. The LUPTM bit in
the SYSCR3 must be programmed so that the following relationship is satisfied:
remains set while the PLL is out of lock, and is cleared when the PLL locks.
standby mode, software must determine before resuming operation whether the PLL has locked (after the
oscillator warm-up period timer has expired) in order to assure clock stability.
Note: If the PLLOFF pin is low when RESET is released, the PLL will be disabled and the oscillator clock
The TMRA01, TMRA23, TMRB0 to TMRB3, SIO0 to SIO4 (there is no SIO2), and SBI have a clock
The on-chip PLL multiplies the frequency of the high-speed oscillator clock (fosc) by four to generate the
Being an analog circuit, the PLL requires a certain duration of time (called lock time) to stabilize, like an
At reset, the default lock-up time is 2
Setting the WUP timer control bit (SYSCR0.WUEF) starts the PLL lock timer. The SYSCR3.LUPTM bit
In real-time applications whose software execution time is critical, once the PLL has gone out of lock in a
will be driven with no frequency multiplication.
Drive capability of the high-speed oscillator
Drive capability of the low-speed oscillator
PLL lock time
C1
C2
C2
C1
Crystal
Crystal
Figure 5.4 Oscillator Clock Drive Capabilities
Oscillator warm-up time
XT1 Pin
XT2 Pin
X1 Pin
X2 Pin
TMP1940CYAF-21
16
/ input frequency.
Oscillation Enable
SYSCR2.DRVOSCH
Oscillation Enable
SYSCR2.DRVOSCL
f
f
OSC
S
TMP1940CYAF