tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 57

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tmp1940cyaf

Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
Note 1:
Note 2:
Note 3:
Note 4:
The Config register in the CP0 has the Doze and Halt bits. Setting the Halt bit puts the TMP1940CYAF in one of
the standby modes, as specified by the STBY1-STBY0 bits in the SYSCR2. Setting the Doze bit puts the
TMP1940CYAF in IDLE mode, irrespective of the settings of the STBY1-STBY0 bits.
When the PLL is not used, the LUPTM bit in the SYSCR3 must be set to 1 (2
The WUPT1-WUPT0 bits in the SYSCR2 must not be changed during the oscillator warm-up period. The LUPTM
bit in the SYSCR3 must not be changed during the PLL lock period.
The following considerations relate to consecutive mode changes immediately after a warm-up event (e.g.,
SLEEP–NORMAL–SLEEP).
Hardware warm-up (with no software intervention)
Software warm-up
(1)
(2)
(1)
(2)
After having transitioned from STOP or SLEEP mode to NORMAL mode
After having transitioned from STOP or SLEEP mode to SLOW mode
Once in SLOW mode, a transition to a next mode can occur immediately.
After having transitioned from SLOW mode to NORMAL mode
After having transitioned from NORMAL mode to SLOW mode
After the oscillator warm-up timer has expired (SYSCR2.WUEF=0), a transition to a next mode can not occur
until at least five program instructions are executed.
When the PLL is used
When the PLL is not used
When the PLL is used
When the PLL is not used
A transition to a next mode can not occur until the PLL locks (SYSCR3.LUPFG=0) and at least five
The NORMAL mode can be entered after the oscillator warm-up period timer has expired (i.e., after the
program instructions are executed (including the instruction to check the LUPFG flag).
SYSCR2.WUEF bit is cleared). A transition to a next mode can not occur until the PLL locks
(SYSCR3.LUPFG=0) and at least five program instructions are executed (including the instruction to
check the LUPFG flag).
When the oscillator warm-up time (SYSCR2.WUPT[1:0]) is programmed to 01 (2
A transition to a next mode can not occur until the PLL locks (SYSCR3.LUPFG=0) and at least five
program instructions are executed.
When the oscillator warm-up time (SYSCR2.WUPT[1:0]) is programmed to either 10 (2
frequency) or 11 (2
A transition to a next mode can not occur until at least five program instructions are executed.
When the oscillator warm-up time (SYSCR2.WUPT[1:0]) is programmed to either 01 (2
frequency)
The NORMAL mode can be entered after the oscillator warm-up period timer has expired (i.e., after
the SYSCR2.WUEF bit is cleared). A transition to a next mode can not occur until the PLL locks
(SYSCR3.LUPFG=0) and at least five program instructions are executed.
When the oscillator warm-up time (SYSCR2.WUPT[1:0]) is programmed to either 10 (2
frequency) or 11 (2
The NORMAL mode can be entered after the oscillator warm-up timer has expired (i.e., after the
SYSCR2.WUEF bit is cleared). A transition to a next mode can not occur until at least five program
instructions are executed.
16
16
TMP1940CYAF-15
/input frequency)
/input frequency)
12
/input frequency).
TMP1940CYAF
8
/input frequency)
14
14
8
/input
/input
/input

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