tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 266
tmp1940cyaf
Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1940CYAF.pdf
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(2) 8-Bit Receive Mode
reception. The receive data is clocked into the internal shift register via the SI pin, synchronous to
the serial clock. Once the shift register is fully loaded, the received byte is transferred to the
SBI0DBR, and the buffer-full interrupt (INTS2) is generated. The INTS2 interrupt service routine
must then pick up the received data from the SBI0DBR.
interrupt service routine reads the data from the SBI0DBR.
mode, the maximum data rate is a function of the maximum latency between when the INTS2
interrupt is generated and when the SBI0DBR is read by the interrupt service routine.
setting the SIOINH bit to 1. If the SIOS bit is cleared, reception continues until the shift register is
fully loaded and transferred to the SBI0DBR. In this case, software can check the SBI0SR.SIOF
bit to determine whether reception has come to an end (0 = end-of-reception). If the SIOINH bit is
set, the ongoing reception is aborted immediately, and the SIOF bit is cleared at that point. (The
received data becomes invalid; there is no need to read it out.)
Note:
SBI0CR1
SBI0CR1
INTS2 interrupt
Reg.
Configure the SIO interface in receive mode. Then setting the SIOS bit in the SBI0CR1 enables
In internal clock mode, the SIO interface will be in wait state (SCK will stop) until the INTS2
In external clock mode, shift operations continue, synchronous to the external clock. In this
Reception can be terminated by the INTS2 interrupt service routine clearing the SIOS bit to 0 or
SCK Pin
SIOF Bit
SO Pin
Figure 14.25 Retention Time of the Last Transmitted Bit
The contents of the SBI0DBR is not preserved after changing the transfer mode. Before
changing the transfer mode, clear the SIOS bit to complete the ongoing reception and have
the INTS2 interrupt service routine pick up the last received data.
7 6 5 4 3 2 1 0
0 1 1 1 0 X X X
1 0 1 1 0 0 0 0
SBI0DBR
bit 6
TMP1940CYAF-224
t
SODH
bit 7
Select receive mode.
Start reception.
Read the received data.
3.5 / fsys /2 seconds (min.)
TMP1940CYAF
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