tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 323

• Manufacturer Part Number: tmp1940cyaf
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Chip Select/Wait Controller (1 of 4)
Mnemonic Name Address
19.3 Chip Select/Wait Controller
BMA0
BMA1
Register
Register
Address
Address
Base/
Base/
Mask
Mask
E400H
E404H
FFFF
FFFF
Bits 9–0 specify the address bits (A23–A14) to be masked.
0: The corresponding address bit is not masked.
1: The corresponding address bit is masked.
Must be
written as
0.
Bits 9–0 specify the address bits (A23–A14) to be masked.
0: The corresponding address bit is not masked.
1: The corresponding address bit is masked.
Must be
written as
0.
15
23
31
15
23
31
7
7
1
0
0
0
1
0
0
0
Must be
written as
0.
Must be
written as
0.
TMP1940CYAF-281
14
22
30
14
22
30
6
6
1
0
0
0
1
0
0
0
Must be
written as
0.
Must be
written as
0.
13
21
29
13
21
29
5
5
1
0
0
0
1
0
0
0
A23–A16 of the starting address for CS0
A31–A24 of the starting address for CS0
A23–A16 of the starting address for CS1
A31–A24 of the starting address for CS1
Must be
written as
0.
Must be
written as
0.
12
20
28
12
20
28
4
4
1
0
0
0
1
0
0
0
MA0
MA0
MA1
MA1
R/W
R/W
BA0
R/W
BA0
R/W
R/W
R/W
BA1
R/W
BA1
R/W
Must be
written as
0.
Must be
written as
0.
11
19
27
11
19
27
3
3
1
0
0
0
1
0
0
0
Must be
written as
0.
Must be
written as
0.
TMP1940CYAF
10
18
26
10
18
26
2
2
1
0
0
0
1
0
0
0
Address mask
0: Not masked
1: Masked
Address mask
0: Not masked
1: Masked
17
25
17
25
1
9
1
9
1
0
0
0
1
0
0
0
16
24
16
24
0
8
0
8
1
0
0
0
1
0
0
0