tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 162

• Manufacturer Part Number: tmp1940cyaf
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

11.2.4
11.2.5
Comparators (CP0 and CP1)
timer register. When a match is detected, an interrupt (INTTA0/INTTA1) is generated and the timer
flip-flop is toggled, if so enabled.
Timer Flip-Flop (TA1FF)
is asserted. The toggling of the timer flip-flop can be enabled and disabled through the programming of
the TAFF1IE bit in the TA1FFCR.
1 or 0 by writing 01 or 10 to the TAFF1C[1:0] field in the TA1FFCR. Additionally, a write of 00 by
software causes the TA1FF to be toggled to the opposite value.
Port 7 registers (P7CR and P7FC) must be programmed to configure the P71/TA1OUT pin as
TA1OUT.
The addresses of the timer registers are as follows:
The timer registers are write-only registers.
The comparator compares the output of the 8-bit up-counter with a time constant value in the 8-bit
The timer flip-flop (TA1FF) is toggled, if so enabled, each time the comparator match-detect output
A reset clears the TAFF1IE bit, disabling the toggling of the TA1FF. The TA1FF can be initialized to
The value of the TA1FF can be driven onto the TA1OUT pin, which is multiplexed with P71. The
TA0REG:
TA1REG:
TA2REG:
TA3REG:
0xFFFF_F102
0xFFFF_F103
0xFFFF_F10A
0xFFFF_F10B
TMP1940CYAF-120
TMP1940CYAF