tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 416

• Manufacturer Part Number: tmp1940cyaf
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

FLCS
(0xFFFF_E520) Read/Write
3.6.14
3.6.15
Flash Control/Status Register
the security feature.
Flash Security
using a general-purpose programmer. Therefore, the TMP1940FDBF flash memory provides a security
feature to prevent intrusive access to the flash memory while in Programmer mode.
disables access to the flash array. The paragraphs that follow describe the methods to secure and
unsecure the flash memory. As is the case with a flash programming routine, the security control routine
must also be placed and executed outside of the flash memory — either the on-chip RAM or an external
memory device.
Name
Reset Value
Function
Note: The Flash Control/Status register must be accessed as a 32-bit quantity.
This is an 8-bit register that indicates the Ready/Busy status of an embedded algorithm and controls
The TMP1940FDBF flash memory supports not only on-board programming but also programming
The TMP1940FDBF has a security bit apart from the flash array. Programming this security bit
Bit 2: Ready/Busy Flag (RDY_BSY)
In Programmer mode, the ALE pin functions as the RDY/
monitor the state of this pin to determine whether an embedded algorithm is in progress or
complete. The CPU can poll the RDY_BSY bit in the FLCS register for the same purpose. The
RDY_BSY bit is cleared to 0 when the flash memory is actively erasing or programming. The
RDY_BSY bit is set to 1 when an embedded operation has completed and the flash memory is
ready to accept the next command. If any failure occurs during the program or erase operation,
this bit remains cleared. A hardware reset sets this bit.
The RDY_BSY bit is cleared upon completion of the final bus write cycle of an embedded
operation command, with one exception. In the case of the Auto Block Erase command, this bit
is cleared after the time-out has expired. Any command is ignored while the RDY_BSY bit is
cleared.
Bit 0: Flash Security Enable (FSE)
The FSE bit is used to enable and disable the security feature. After a reset, this bit is cleared.
Under this condition, the program and erase commands access the memory array. To turn on
the security feature, set the FSE bit and write the Auto Security On command. Thereafter, the
FSE bit must be cleared to enable access to the memory array. To turn off the security feature,
set the FSE bit and write the Auto Security Off command.
7
Figure 3.18 Flash Control/Status Register
6
5
TMP1940FDBF-58
4
Must be
written
as 0.
R/W
3
0
Ready/Busy
0: Embedded
1: Embedded
algorithm is in
progress.
algorithm is
complete.
RDY_BSY
2
R
1
BSY
TMP1940FDBF
Must be
written
as 0.
R/W
pin. The host system can
1
0
Flash security
enable
0: Access flash
1: Access security
memory array
control logic
R/W
FSE
0
0