SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 938

• Manufacturer Part Number: SAM3U2C
• Manufacturer: Atmel Corporation

Specifications of SAM3U2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

38.7.32
Name:
Address:
Access:
This register acts as a double buffer for the CV and CVM values. This prevents an unexpected comparison x match.
Only the first 16 bits (channel counter size) of field CV
• CVUPD: Comparison x Value Update
Define the comparison x value to be compared with the counter of the channel 0.
• CVMUPD: Comparison x Value Mode Update
0 = The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is
incrementing.
1 = The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is
decrementing.
Note:
CAUTION: to be taken into account, the write of the register PWM_CMPVUPDx must be followed by a write of the register
PWM_CMPMUPDx.
938
938
31
23
15
–
7
This bit is useless if the counter of the channel 0 is left aligned (CALG = 0 in
SAM3U Series
SAM3U Series
PWM Comparison x Value Update Register
PWM_CMPVUPDx
0x4008C134 [0], 0x4008C144 [1], 0x4008C154 [2], 0x4008C164 [3], 0x4008C174 [4], 0x4008C184 [5],
0x4008C194 [6], 0x4008C1A4 [7]
Write-only
30
22
14
–
6
29
21
13
–
5
28
20
12
–
4
UPD
CVUPD
CVUPD
CVUPD
are significant.
27
19
11
–
3
“PWM Channel Mode Register” on page
26
18
10
–
2
25
17
–
9
1
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
CVMUPD
24
16
941)
8
0