SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 392

• Manufacturer Part Number: SAM3U2C
• Manufacturer: Atmel Corporation

Specifications of SAM3U2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.16.4
25.16.4.1
392
392
SAM3U Series
SAM3U Series
NFC SRAM
NFC SRAM Mapping
If the NFC is used to read and write Data from and to the NAND Flash, the configuration
depends on the page size. See
The NFC SRAM size is 4 Kbytes. The NFC can handle NAND Flash with a page size of 4 Kbytes
or of a lower size (such as 2 Kbytes for example). In case of a 2-KByte or lower page size, the
NFC SRAM can be split into several banks. The SMC_BANK field enables to select the bank
used.
Note that a “ping-pong” mode (write or read to a bank while the NFC writes or reads to another
bank) is not accessible with the NFC (using 2 different banks).
If the NFC is not used, the NFC SRAM can be used for a general purpose by the application.
Table 25-9.
Table 25-10. NFC SRAM Mapping with NAND Flash Page Size of 4 Kbytes + 128 bytes
Offset
0x00000000-0x000001FF
0x00000200-0x000003FF
0x00000400-0x000005FF
0x00000600-0x000007FF
0x00000800-0x0000080F
0x00000810-0x0000081F
0x00000820-0x0000082F
0x00000830-0x0000083F
0x00000840-0x00000A3F
0x00000A40-0x00000C3F
0x00000C40-0x00000E3F
0x00000E40-0x0000103F
0x00001040-0x0000104F
0x00001050-0x0000105F
0x00001060-0x0000106F
0x00001070-0x0000107F
0x00001080-0x00001FFF
Offset
0x00000000-0x000001FF
0x00000200-0x000003FF
0x00000400-0x000005FF
0x00000600-0x000007FF
0x00000800-0x000009FF
0x00000A00-0x00000BFF
0x00000C00-0x00000DFF
0x00000E00-0x00000FFF
NFC SRAM Mapping with NAND Flash Page Size of 2 Kbytes + 64 bytes
Table 25-9
Use
Bank 0 Main Area Buffer 0
Bank 0 Main Area Buffer 1
Bank 0 Main Area Buffer 2
Bank 0 Main Area Buffer 3
Bank 0 Main Area Buffer 4
Bank 0 Main Area Buffer 5
Bank 0 Main Area Buffer 6
Bank 0 Main Area Buffer 7
Use
Bank 0 Main Area Buffer 0
Bank 0 Main Area Buffer 1
Bank 0 Main Area Buffer 2
Bank 0 Main Area Buffer 3
Bank 0 Spare Area 0
Bank 0 Spare Area 1
Bank 0 Spare Area 2
Bank 0 Spare Area 3
Bank 1 Main Area Buffer 0
Bank 1 Main Area Buffer 1
Bank 1 Main Area Buffer 2
Bank 1 Main Area Buffer 3
Bank 1 Spare Area 0
Bank 1 Spare Area 1
Bank 1 Spare Area 2
Bank 1 Spare Area 3
Reserved
and
Table 25-10
for detailed mapping.
Access
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Access
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
–
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11