SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 359

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SAM3U2C

Manufacturer Part Number
SAM3U2C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U2C

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
25.9.2.2
Figure 25-6. Connection of 2 x 8-bit Devices on a 16-bit Bus: Byte Write Option
25.9.2.3
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
Signal Multiplexing
Byte Select Access
In this mode, read/write operations can be enabled/disabled at byte level. One byte-select line
per byte of the data bus is provided. One NRD and one NWE signal control read and write.
Depending on the byte access type (BAT), only the write signals or the byte select signals are
used. To save IOs at the external bus interface, control signals at the SMC interface are multi-
plexed.
access type.
For 16-bit devices, bit A0 of address is unused. When Byte Select Option is selected, NWR1 is
unused. When Byte Write option is selected, NBS0 is unused.
Table 25-5.
Signal Name
Device Type
Byte Access Type (BAT)
NBS0_A0
NWE_NWR0
NBS1_NWR1
A1
• For 16-bit devices: the SMC provides NBS0 and NBS1 selection signals for respectively
byte0 (lower byte) and byte1 (upper byte) of a 16-bit bus.
Byte Select Access is used to connect one 16-bit device.
SMC
Table 25-5
D[15:8]
NCS[3]
A[24:2]
SMC Multiplexed Signal Translation
NWR0
NWR1
D[7:0]
NRD
A1
shows signal multiplexing depending on the data bus width and the byte
Byte Select
1x16-bit
NBS0
NBS1
NWE
A1
16-bit Bus
A[23:1]
A[0]
Write Enable
Read Enable
Memory Enable
D[15:8]
A[23:1]
Write Enable
Read Enable
Memory Enable
D[7:0]
A[0]
Byte Write
2 x 8-bit
NWR0
NWR1
A1
SAM3U Series
SAM3U Series
8-bit Bus
1 x 8-bit
NWE
A0
A1
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