SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 101

• Manufacturer Part Number: SAM3U2C
• Manufacturer: Atmel Corporation

Specifications of SAM3U2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.11 Memory access instructions
6430E–ATARM–29-Aug-11
Table 13-17
Table 13-17. Memory access instructions
Mnemonic
ADR
CLREX
LDM{mode}
LDR{type}
LDR{type}
LDR{type}T
LDR
LDREX{type}
POP
PUSH
STM{mode}
STR{type}
STR{type}
STR{type}T
STREX{type}
shows the memory access instructions:
Brief description
Load PC-relative address
Clear Exclusive
Load Multiple registers
Load Register using immediate
offset
Load Register using register offset
Load Register with unprivileged
access
Load Register using PC-relative
address
Load Register Exclusive
Pop registers from stack
Push registers onto stack
Store Multiple registers
Store Register using immediate
offset
Store Register using register offset
Store Register with unprivileged
access
Store Register Exclusive
See
“ADR” on page 102
“CLREX” on page 116
“LDM and STM” on page 111
“LDR and STR, immediate offset” on
page 103
“LDR and STR, register offset” on page
106
“LDR and STR, unprivileged” on page
108
“LDR, PC-relative” on page 109
“LDREX and STREX” on page 114
“PUSH and POP” on page 113
“PUSH and POP” on page 113
“LDM and STM” on page 111
“LDR and STR, immediate offset” on
page 103
“LDR and STR, register offset” on page
106
“LDR and STR, unprivileged” on page
108
“LDREX and STREX” on page 114
SAM3U Series
101