SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 732
SAM3U2C
Manufacturer Part Number
SAM3U2C
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U2C
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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732
732
SAM3U Series
SAM3U Series
Write Protection Registers
To prevent any single software error that may corrupt USART behavior, certain address spaces
can be write-protected by setting the WPEN bit in the USART Write Protect Mode Register
(US_WPMR).
If a write access to the protected registers is detected, then the WPVS flag in the USART Write
Protect Status Register (US_WPSR) is set and the field WPVSRC indicates in which register the
write access has been attempted.
The WPVS flag is reset by writing the USART Write Protect Mode Register (US_WPMR) with
the appropriate access key, WPKEY.
The protected registers are:
•
•
•
•
•
•
•
“USART Mode Register”
“USART Baud Rate Generator Register”
“USART Receiver Time-out Register”
“USART Transmitter Timeguard Register”
“USART FI DI RATIO Register”
“USART IrDA FILTER Register”
“USART Manchester Configuration Register”
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
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