SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 944
SAM3U2C
Manufacturer Part Number
SAM3U2C
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U2C
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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38.7.37
Name:
Address:
Access:
This register acts as a double buffer for the CDTY value. This prevents an unexpected waveform when modifying the wave-
form duty-cycle.
Only the first 16 bits (channel counter size) are significant.
• CDTYUPD: Channel Duty-Cycle Update
Defines the waveform duty-cycle. This value must be defined between 0 and CPRD (PWM_CPRx).
944
944
31
23
15
–
7
SAM3U Series
SAM3U Series
PWM Channel Duty Cycle Update Register
PWM_CDTYUPDx [x=0..3]
0x4008C208 [0], 0x4008C228 [1], 0x4008C248 [2], 0x4008C268 [3]
Write-only.
30
22
14
–
6
29
21
13
–
5
28
20
12
–
4
CDTYUPD
CDTYUPD
CDTYUPD
27
19
11
–
3
26
18
10
–
2
25
17
–
9
1
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
24
16
–
8
0
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