SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 1138
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SAM3U2C
Manufacturer Part Number
SAM3U2C
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U2C
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Table 43-46. SPI Timings (Continued)
Notes:
Note that in SPI master mode the SAM3U does not sample the data (MISO) on the opposite edge where data clocks out
(MOSI) but the same edge is used as shown in
43.9.4
43.9.5
1138
Symbol
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
2. 1.8V domain: V
1. 3.3V domain: V
SAM3U Series
MCI Timings
SSC Timings
Parameter
MISO Hold time after SPCK rises (master)
SPCK rising to MOSI Delay (master)
MISO Setup time before SPCK falls (master)
MISO Hold time after SPCK falls (master)
SPCK falling to MOSI Delay (master)
SPCK falling to MISO Delay (slave)
MOSI Setup time before SPCK rises (slave)
MOSI Hold time after SPCK rises (slave)
SPCK rising to MISO Delay (slave)
MOSI Setup time before SPCK falls (slave)
MOSI Hold time after SPCK falls (slave)
NPCS Setup time to SPCK (slave)
NPCS Hold time after SPCK (slave)
NPCS Setup time to SPCK (slave)
NPCS Hold time after SPCK (slave)
VDDIO
VDDIO
The High Speed MultiMedia Card Interface (HSMCI) supports the MultiMedia Card (MMC)
Specification V4.3, the SD Memory Card Specification V2.0, the SDIO V2.0 specification and
CE-ATA V1.1.
Timings are given assuming the following VDDIO supply and load.
VDDIO = 1.62V @25pF
from 3.0V to 3.6V, maximum external capacitor = 30 pF.
from 1.65V to 1.95V, maximum external capacitor = 30 pF.
Figure 43-12
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
Conditions
and
Figure
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
43-13.
Min
0.5
0.5
1.5
1.5
5.2
4.2
14
17
0
0
0
0
1
1
0
0
5
0
0
4
0
0
Max
3.5
3.5
14
17
14
17
3
3
6430E–ATARM–29-Aug-11
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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