NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 686
NH82801HEM S LB9B
Manufacturer Part Number
NH82801HEM S LB9B
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LB9B.pdf
(890 pages)
Specifications of NH82801HEM S LB9B
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17.2.32
17.2.33
686
IR—Immediate Response Register
(Intel
Memory Address:HDBAR + 64h
Default Value:
IRS—Immediate Command Status Register
(Intel
Memory Address:HDBAR + 68h
Default Value:
31:0
15:2
Bit
Bit
1
0
Immediate Response Read (IRR) — RO. This register contains the response received
from a codec resulting from a command sent via the Immediate Command mechanism.
If multiple codecs responded in the same time, there is no assurance as to which
response will be latched. Therefore, broadcast-type commands must not be issued via
the Immediate Command mechanism.
Reserved.
Immediate Result Valid (IRV) — R/WC. This bit is set to 1 by hardware when a new
response is latched into the Immediate Response register (HDBAR + 64). This is a
status flag indicating that software may read the response from the Immediate
Response register.
Software must clear this bit by writing a 1 to it before issuing a new command so that
the software may determine when a new response has arrived.
Immediate Command Busy (ICB) — R/W. When this bit is read as 0, it indicates that
a new command may be issued using the Immediate Command mechanism. When this
bit transitions from 0-to-1 (via software writing a 1), the controller issues the command
currently stored in the Immediate Command register to the codec over the link. When
the corresponding response is latched into the Immediate Response register, the
controller hardware sets the IRV flag and clears the ICB bit back to 0.
NOTE: An Immediate Command must not be issued while the CORB/RIRB mechanism
®
®
High Definition Audio Controller—D27:F0)
High Definition Audio Controller—D27:F0)
is operating; otherwise, the responses conflict. This must be enforced by
software.
00000000h
0000h
Intel
®
Description
Description
High Definition Audio Controller Registers (D27:F0)
Attribute:
Size:
Attribute:
Size:
RO
32 bits
R/W, R/WC
16 bits
Intel
®
ICH8 Family Datasheet
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