NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 472
NH82801HEM S LB9B
Manufacturer Part Number
NH82801HEM S LB9B
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LB9B.pdf
(890 pages)
Specifications of NH82801HEM S LB9B
Lead Free Status / RoHS Status
Compliant
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12.1.12
12.1.13
472
SCMD_BAR—Secondary Command Block Base Address
Register (IDE D31:F1)
Address Offset: 18h
Default Value:
NOTE: This 4-byte I/O space is used in native mode for the Secondary Controller’s Command
SCNL_BAR—Secondary Control Block Base Address
Register (IDE D31:F1)
Address Offset: 1Ch
Default Value:
NOTE: This 4-byte I/O space is used in native mode for the Secondary Controller’s Command
31:16
31:16
15:3
15:2
2:1
Bit
Bit
0
1
0
Block.
Block.
Reserved
Base Address — R/W. This field provides the base address of the I/O space
(8 consecutive I/O locations).
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 to indicate a request for I/O
space.
Reserved
Base Address — R/W. This field provides the base address of the I/O space
(4 consecutive I/O locations).
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 to indicate a request for I/O
space.
00000001h
00000001h
–
–
1Bh
1Fh
Description
Description
Attribute:
Size:
Attribute:
Size:
SATA Controller Registers (D31:F2)
R/W, RO
32 bits
R/W, RO
32 bits
Intel
®
ICH8 Family Datasheet
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