NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 184

• Manufacturer Part Number: NH82801HEM S LB9B
• Manufacturer: Intel

Specifications of NH82801HEM S LB9B

• Lead Free Status / RoHS Status: Compliant

5.14
Note:
Note:
5.14.1
5.14.1.1
5.14.1.2
184
System Management (D31:F0)
The ICH8 provides various functions to make a system easier to manage and to lower
the Total Cost of Ownership (TCO) of the system. In addition, ICH8 provides integrated
ASF Management support. Features and functions can be augmented via external A/D
converters and GPIO, as well as an external microcontroller.
The following features and functions are supported by the ICH8:
Voltage ID from the processor can be read via GPI signals.
ASF functionality with the integrated ICH8 ASF controller requires a correctly
configured system, including an appropriate (G)MCH with ME, ME Firmware, system
BIOS support, and appropriate Platform LAN Connect Device.
Theory of Operation
The System Management functions are designed to allow the system to diagnose failing
subsystems. The intent of this logic is that some of the system management
functionality be provided without the aid of an external microcontroller.
Detecting a System Lockup
When the processor is reset, it is expected to fetch its first instruction. If the processor
fails to fetch the first instruction after reset, the TCO timer times out twice and the
ICH8 asserts PLTRST#.
Handling an Intruder
The ICH8 has an input signal, INTRUDER#, that can be attached to a switch that is
activated by the system’s case being open. This input has a two RTC clock debounce. If
INTRUDER# goes active (after the debouncer), this will set the INTRD_DET bit in the
TCO_STS register. The INTRD_SEL bits in the TCO_CNT register can enable the ICH8 to
cause an SMI# or interrupt. The BIOS or interrupt handler can then cause a transition
to the S5 state by writing to the SLP_EN bit.
The software can also directly read the status of the INTRUDER# signal (high or low) by
clearing and then reading the INTRD_DET bit. This allows the signal to be used as a GPI
if the intruder function is not required.
• Processor present detection
• Various Error detection (such as ECC Errors) Indicated by host controller
• Intruder Detect input
• Detection of bad BIOS Flash (FWH or Flash on SPI) programming
• Ability to hide a PCI device
— Detects if processor fails to fetch the first instruction after reset
— Can generate SMI#, SCI, SERR, NMI, or TCO interrupt
— Can generate TCO interrupt or SMI# when the system cover is removed
— INTRUDER# allowed to go active in any power state, including G3
— Detects if data on first read is FFh (indicates that BIOS flash is not
— Allows software to hide a PCI device in terms of configuration space through
programmed)
the use of a device hide register (See
Section
7.1.71)
Intel
®
Functional Description
ICH8 Family Datasheet