NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 300
NH82801HEM S LB9B
Manufacturer Part Number
NH82801HEM S LB9B
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LB9B.pdf
(890 pages)
Specifications of NH82801HEM S LB9B
Lead Free Status / RoHS Status
Compliant
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7.1.68
300
HPTC—High Precision Timer Configuration Register
Offset Address: 3404–3407h
Default Value:
31:8
6:2
1:0
Bit
7
Reserved
Address Enable (AE) — R/W.
0 = Address disabled.
1 = The Intel
Reserved
Address Select (AS) — R/W. This 2-bit field selects 1 of 4 possible memory address
ranges for the High Precision Timer functionality. The encodings are:
00 = FED0_0000h - FED0_03FFh
01 = FED0_1000h - FED0_13FFh
10 = FED0_2000h - FED0_23FFh
11 = FED0_3000h - FED0_33FFh
selected by bits 1:0 below.
00000000h
®
ICH8 will decode the High Precision Timer memory address range
Description
Size:
Attribute:
Chipset Configuration Registers
R/W
32-bit
Intel
®
ICH8 Family Datasheet
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