NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 291
NH82801HEM S LB9B
Manufacturer Part Number
NH82801HEM S LB9B
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LB9B.pdf
(890 pages)
Specifications of NH82801HEM S LB9B
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Chipset Configuration Registers
7.1.56
7.1.57
Intel
®
ICH8 Family Datasheet
D27IP—Device 27 Interrupt Pin Register
Offset Address: 3110–3113h
Default Value:
D26IP—Device 26 Interrupt Pin Register
Offset Address: 3114–3117h
Default Value:
31:28
31:4
27:8
3:0
7:4
3:0
Bit
Bit
Reserved
Intel
Intel High Definition Audio controller drives as its interrupt.
0h = No interrupt
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h–Fh = Reserved
EHCI #2 Pin (E2IP): This field indicates which pin the EHCI controller #2 drives as
its interrupt:
0h = No Interrupt
1h = INTA#
2h = INTB#
3h = INTC# (Default)
4h = INTD#
5h–Fh = Reserved
Reserved
UHCI #5 Pin (U5P): This field applies to UHCI controller #5 (ports 8 & 9)
0h = No Interrupt
1h = INTA#
2h = INTB# (Default)
3h = INTC#
4h = INTD#
5h–Fh = Reserved
UHCI #4 Pin (U4P): This field applies to UHCI controller #4 (ports 6 and 7)
0h = No Interrupt
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h–Fh = Reserved
®
High Definition Audio Pin (ZIP) — R/W. This field indicates which pin the
00000001h
30000021h
Description
Description
Attribute:
Size:
Attribute:
Size:
R/W
32-bit
R/W, RO
32-bit
291
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