NH82801HEM S LB9B Intel, NH82801HEM S LB9B Datasheet - Page 453

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NH82801HEM S LB9B

Manufacturer Part Number
NH82801HEM S LB9B
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801HEM S LB9B

Lead Free Status / RoHS Status
Compliant
IDE Controller Registers (D31:F1) (Mobile Only)
11.1.12
.
11.1.13
11.1.14
Intel
®
ICH8 Family Datasheet
PCNL_BAR—Primary Control Block Base Address
Register (IDE—D31:F1)
Address Offset:
Default Value:
NOTE: This 4-byte I/O space is used in native mode for the Primary Controller’s Command Block.
SCMD_BAR—Secondary Command Block Base Address
Register (IDE D31:F1)
Address Offset:
Default Value:
NOTE: This 4-byte I/O space is used in native mode for the Secondary Controller’s Command
SCNL_BAR—Secondary Control Block Base Address
Register (IDE D31:F1)
Address Offset:
Default Value:
NOTE: This 4-byte I/O space is used in native mode for the Secondary Controller’s Command
31:16
31:16
31:16
15:3
15:2
15:2
2:1
Bit
Bit
Bit
0
1
0
1
0
Block.
Block.
Reserved
Base Address — R/W. Base address of the I/O space (4 consecutive I/O locations).
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 indicating a request for I/O space.
Reserved
Base Address — R/W. Base address of the I/O space (8 consecutive I/O locations).
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 indicating a request for I/O space.
Reserved
Base Address — R/W. Base address of the I/O space (4 consecutive I/O locations).
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 indicating a request for I/O space.
14h
00000001h
18h
00000001h
1Ch
00000001h
17h
1Bh
1Fh
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
R/W, RO
32 bits
R/W, RO
32 bits
R/W, RO
32 bits
453

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