UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 557

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Serial
interface
UART6
Serial
interfaces
CSI10,
CSI11
Function
Normal reception
Serial clock
generation
Permissible baud
rate range during
reception
SOTB1n:
Transmit buffer
register 1n
SIO1n: Serial I/O
shift register 1n
CSIM1n: Serial
operation mode
register 1n
CSIC10: Serial
clock selection
register 10
CSIC11: Serial
clock selection
register 11
3-wire serial I/O
mode
Communication
operation
SO1n output
Details of
Function
Be sure to read receive buffer register 6 (RXB6) even if a reception error occurs.
Otherwise, an overrun error will occur when the next data is received, and the
reception error status will persist.
Reception is always performed with the “number of stop bits = 1”. The second
stop bit is ignored.
Be sure to read asynchronous serial interface reception error status register 6
(ASIS6) before reading RXB6.
Keep the baud rate error during transmission to within the permissible error
range at the reception destination.
Make sure that the baud rate error during reception satisfies the range shown in
(4) Permissible baud rate range during reception.
Make sure that the baud rate error during reception is within the permissible
error range, by using the calculation expression shown below.
Do not access SOTB1n when CSOT1n = 1 (during serial communication).
The SSI11 pin can be used in the slave mode. For details of the
transmission/reception operation, see 15.4.2 (2) Communication operation.
Do not access SIO1n when CSOT1n = 1 (during serial communication).
The SSI11 pin can be used in the slave mode. For details of the reception
operation, see 15.4.2 (2) Communication operation.
Be sure to clear bit 5 to 0.
When the internal oscillation clock is selected as the clock supplied to the CPU,
the clock of the internal oscillator is divided and supplied as the serial clock. At
this time, the operation of serial interface CSI10 is not guaranteed.
Do not write to CSIC10 while CSIE10 = 1 (operation enabled).
When using P10/SCK10/TxD0, P11/SI10/RxD0, and P12/SO10 as general-
purpose port pins, set CSIC10 in the default status (00H).
The phase type of the data clock is type 1 after reset.
When the internal oscillation clock is selected as the clock supplied to the CPU,
the clock of the internal oscillator is divided and supplied as the serial clock. At
this time, the operation of serial interface CSI10 is not guaranteed.
Do not write to CSIC11 while CSIE11 = 1 (operation enabled).
When using P02/SO11, P03/SI11, and P04/SCK11 as general-purpose port
pins, set CSIC10 in the default status (00H).
The phase type of the data clock is type 1 after reset.
Take relationship with the other party of communication when setting the port
mode register and port register.
Do not access the control register and data register when CSOT1n = 1 (during
serial communication).
When using serial interface CSI11, wait for the duration of at least one clock
before the clock operation is started to change the level of the SSI11 pin in the
slave mode; otherwise, malfunctioning may occur.
If a value is written to TRMD1n, DAP1n, and DIR1n, the output value of SO1n
changes.
APPENDIX D LIST OF CAUTIONS
User’s Manual U16899EJ3V0UD
Cautions
p. 317
p. 317
p. 317
p. 323
p. 323
p. 325
p. 330
p. 330
p. 330
p. 330
p. 331
p. 334
p. 334
p. 334
p. 334
p. 335
p. 335
p. 335
p. 335
p. 338
p. 341
p. 341
p. 347
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