UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 332

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UPD78F0138HGK-9ET-A

Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet

Specifications of UPD78F0138HGK-9ET-A

Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
(1) Transmit buffer register 1n (SOTB1n)
(2) Serial I/O shift register 1n (SIO1n)
330
SI11/P03
SCK11/P04
Remark n = 0:
This register sets the transmit data.
Transmission/reception is started by writing data to SOTB1n when bit 7 (CSIE1n) and bit 6 (TRMD1n) of serial
operation mode register 1n (CSIM1n) is 1.
The data written to SOTB1n is converted from parallel data into serial data by serial I/O shift register 1n, and
output to the serial output pin (SO1n).
SOTB1n can be written or read by an 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Cautions 1. Do not access SOTB1n when CSOT1n = 1 (during serial communication).
This is an 8-bit register that converts data from parallel data into serial data and vice versa.
This register can be read by an 8-bit memory manipulation instruction.
Reception is started by reading data from SIO1n if bit 6 (TRMD1n) of serial operation mode register 1n (CSIM1n)
is 0.
During reception, the data is read from the serial input pin (SI1n) to SIO1n.
RESET input clears this register to 00H.
Cautions 1. Do not access SIO1n when CSOT1n = 1 (during serial communication).
f
f
f
f
f
f
X
X
X
X
X
X
f
X
/2
/2
/2
/2
/2
/2
/2
2
3
4
5
6
7
Figure 15-2. Block Diagram of Serial Interface CSI11
n = 0, 1:
2. The SSI11 pin can be used in the slave mode. For details of the transmission/reception
2. The SSI11 pin can be used in the slave mode. For details of the reception operation, see
operation, see 15.4.2 (2) Communication operation.
15.4.2 (2) Communication operation.
Transmit data
controller
PD78F0132H
PD78F0133H, 78F0134H, 78F0136H, 78F0138H, 78F0138HD
( PD78F0133H, 78F0134H, 78F0136H, 78F0138H, and 78F0138HD Only)
Serial I/O shift
register 11 (SIO11)
Clock start/stop controller &
CHAPTER 15 SERIAL INTERFACES CSI10 AND CSI11
clock phase controller
Transmit controller
8
Internal bus
Output latch
User’s Manual U16899EJ3V0UD
Transmit buffer
register 11 (SOTB11)
8
selector
Output
INTCSI11
Output latch
(P02)
PM02
SSI11
SO11/P02

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