UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 146

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

144
Address FFBAH
Symbol
TMC00
TMC003 TMC002 TMC001
OVF00
Cautions 1. Timer operation must be stopped before writing to bits other than the OVF00 flag.
Remark TO00:
0
0
0
0
1
1
1
1
0
1
7
0
Overflow not detected
Overflow detected
0
0
1
1
0
0
1
1
TI000:
TM00:
CR000: 16-bit timer capture/compare register 000
CR010: 16-bit timer capture/compare register 010
2. Set the valid edge of the TI000/P00 pin using prescaler mode register 00 (PRM00).
3. If any the following modes: the mode in which clear & start occurs on match between TM00
6
0
and CR000, the mode in which clear & start occurs at the TI000 pin valid edge, or free-running
mode is selected, when the set value of CR000 is FFFFH and the TM00 value changes from
FFFFH to 0000H, the OVF00 flag is set to 1.
After reset: 00H
Figure 6-6. Format of 16-Bit Timer Mode Control Register 00 (TMC00)
0
1
0
1
0
1
0
1
16-bit timer/event counter 00 output pin
16-bit timer/event counter 00 input pin
16-bit timer counter 00
5
0
Operation stop
(TM00 cleared to 0)
Free-running mode
Clear & start occurs on TI000
pin valid edge
Clear & start occurs on match
between TM00 and CR000
4
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Operating mode and clear
TMC003
R/W
mode selection
3
TMC002
16-bit timer counter 00 (TM00) overflow detection
2
User’s Manual U16899EJ3V0UD
TMC001
1
OVF00
<0>
No change
Match between TM00 and
CR000 or match between
TM00 and CR010
Match between TM00 and
CR000, match between TM00
and CR010 or TI000 pin valid
edge
Match between TM00 and
CR000 or match between
TM00 and CR010
Match between TM00 and
CR000, match between TM00
and CR010 or TI000 pin valid
edge
TO00 inversion timing selection
Not generated
<When used as compare
register>
Generated on match between
TM00 and CR000, or match
between TM00 and CR010
<When used as capture
register>
Generated by inputting CR000
capture trigger
Interrupt request generation