UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 274

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UPD78F0138HGK-9ET-A

Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet

Specifications of UPD78F0138HGK-9ET-A

Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
<R>
(1) Receive buffer register 0 (RXB0)
(2) Receive shift register 0 (RXS0)
(3) Transmit shift register 0 (TXS0)
272
This 8-bit register stores parallel data converted by receive shift register 0 (RXS0).
Each time 1 byte of data has been received, new receive data is transferred to this register from receive shift
register 0 (RXS0).
If the data length is set to 7 bits the receive data is transferred to bits 0 to 6 of RXB0 and the MSB of RXB0 is
always 0.
If an overrun error (OVE0) occurs, the receive data is not transferred to RXB0.
RXB0 can be read by an 8-bit memory manipulation instruction. No data can be written to this register.
RESET input or POWER0 = 0 sets this register to FFH.
This register converts the serial data input to the R
RXS0 cannot be directly manipulated by a program.
This register is used to set transmit data. Transmission is started when data is written to TXS0, and serial data is
transmitted from the T
TXS0 can be written by an 8-bit memory manipulation instruction. This register cannot be read.
RESET input, POWER0 = 0, or TXE0 = 0 sets this register to FFH.
Caution1.
2.
Do not write the next transmit data to TXS0 before the transmission completion interrupt
signal (INTST0) is generated.
Set transmit data to TXS0 at least two base clocks after setting POWER0 = 1 and one base
clock after setting TXE0 = 1.
X
D0 pins.
CHAPTER 13 SERIAL INTERFACE UART0
User’s Manual U16899EJ3V0UD
X
D0 pin into parallel data.

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