UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 244

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UPD78F0138HGK-9ET-A

Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet

Specifications of UPD78F0138HGK-9ET-A

Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
(4) When CPU clock and watchdog timer operation clock are the internal oscillation clocks (f
10.4.4 Watchdog timer operation in HALT mode (when “internal oscillator can be stopped by software” is
high-speed system clock (f
the watchdog timer is the high-speed system clock (f
counting is started again using the operation clock before the operation was stopped. At this time, the counter is not
cleared to 0 but holds its value.
242
The watchdog timer stops counting during HALT instruction execution regardless of whether the CPU clock is the
Figure 10-7. Operation in STOP Mode (CPU Clock and WDT Operation Clock: Internal Oscillator Clock)
CPU operation
CPU operation
STOP instruction is executed
When the STOP instruction is executed, operation of the watchdog timer is stopped. After STOP mode is
released, counting is started again using the operation clock before the operation was stopped. At this time, the
counter is not cleared to 0 but holds its value.
Watchdog timer
Watchdog timer
selected by option byte)
f
f
f
XP
XP
XT
f
f
R
Normal operation
R
Normal operation
(internal
oscillation clock)
Operating
Operating Operation stopped
XP
), internal oscillation clock (f
Operation stopped
Oscillation
stopped
Figure 10-8. Operation in HALT Mode
STOP
HALT
CHAPTER 10 WATCHDOG TIMER
User’s Manual U16899EJ3V0UD
Clock supply stopped
XP
Oscillation stabilization time
) or internal oscillation clock (f
(set by OSTS register)
17 clocks
R
), or subsystem clock (f
Operating
Normal operation (internal oscillation clock)
Normal operation
Operating
XT
), or whether the operation clock of
R
). After HALT mode is released,
R
) when the

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