UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 131

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UPD78F0138HGK-9ET-A

Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet

Specifications of UPD78F0138HGK-9ET-A

Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Operation
Mode
Reset
STOP
HALT
Notes 1.
Caution The RSTOP setting is valid only when “Can be stopped by software” is set for internal oscillator by
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
Status
2.
3.
4.
the option byte.
MCC:
RSTOP: Bit 0 of the internal oscillation mode register (RCM)
MCM0:
Caution The RSTOP setting is valid only when “Can be stopped by software” is set for internal
MSTOP = 1
MSTOP = 0
MCC = 1
MCC = 0
Note Setting high-speed system clock oscillator oscillating/stopped differs depending on the CPU clock
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
When “Cannot be stopped” is selected for internal oscillator by the option byte.
When “Can be stopped by software” is selected for internal oscillator by the option byte.
Operates using the CPU clock at STOP instruction execution.
Operates using the CPU clock at HALT instruction execution.
MSTOP = 0
Stopped
Oscillating
MCC = 0
used.
Table 5-3. Relationship Between Operation Clocks in Each Operation Status
High-Speed System
Note
Note
Clock Oscillator
When the internal oscillation clock is used as the CPU clock: Set using the MSTOP bit
When the subsystem clock is used as the CPU clock: Set using the MCC bit
Bit 7 of the processor clock control register (PCC)
Bit 0 of the main clock mode register (MCM)
oscillator by the option byte.
Note
Note
MCC:
RSTOP: Bit 0 of the internal oscillation mode register (RCM)
Table 5-4. Oscillation Control Flags and Clock Oscillation Status
RSTOP = 0
RSTOP = 1
RSTOP = 0
RSTOP = 1
RSTOP = 0
RSTOP = 1
RSTOP = 0
RSTOP = 1
MSTOP = 1
Stopped
MCC = 1
Bit 7 of the processor clock control register (PCC)
Stopped
Oscillating Oscillating Stopped
High-Speed System Clock Oscillator
Stopped
Setting prohibited
Oscillating
Stopped
Oscillating
Note 1
CHAPTER 5 CLOCK GENERATOR
User’s Manual U16899EJ3V0UD
Internal Oscillator
RSTOP = 0 RSTOP = 1
Note 2
Subsystem
Oscillating
Oscillator
Oscillating
Oscillating
Stopped
Oscillating
Stopped
Oscillating
Stopped
Clock
Internal Oscillator
CPU Clock
Internal
oscillation
clock
Note 3
Note 4
Release
After
Supplied to Peripherals
MCM0 = 0 MCM0 = 1
Stopped
Stopped
Internal
oscillation
clock
Prescaler Clock
High-
speed
system
clock
129

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