UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 110

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

(3) Pull-up resistor option registers (PU0, PU1, PU3 to PU5, PU7, PU12, and PU14)
108
Symbol
PU12
PU14
PU0
PU1
PU3
PU4
PU5
PU7
These registers specify whether the on-chip pull-up resistors of P00 to P06, P10 to P17, P30 to P33, P40 to P43,
P50 to P53, P70 to P77, P120, or P140 and P141 are to be used or not. On-chip pull-up resistors can be used in
1-bit units only for the bits set to input mode of the pins to which the use of an on-chip pull-up resistor has been
specified in PU0, PU1, PU3 to PU5, PU7, PU12, and PU14. On-chip pull-up resistors cannot be connected to
bits set to output mode and bits used as alternate-function output pins, regardless of the settings of PU0, PU1,
PU3 to PU5, PU7, PU12, and PU14.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears these registers to 00H.
PUmn
PU17
PU77
7
0
7
7
0
7
0
7
0
7
7
0
7
0
0
1
On-chip pull-up resistor not connected
On-chip pull-up resistor connected
PU06
PU16
PU76
6
6
6
0
6
0
6
0
6
6
0
6
0
Figure 4-23. Format of Pull-up Resistor Option Register
PU05
PU15
PU75
5
5
5
0
5
0
5
0
5
5
0
5
0
PU04
PU14
PU74
4
4
4
0
4
0
4
0
4
4
0
4
0
CHAPTER 4 PORT FUNCTIONS
User’s Manual U16899EJ3V0UD
PU03
PU13
PU33
PU43
PU53
PU73
Pmn pin on-chip pull-up resistor selection
3
3
3
3
3
3
3
0
3
0
(m = 0, 1, 3 to 5, 7, 12, 14; n = 0 to 7)
PU02
PU12
PU32
PU42
PU52
PU72
2
2
2
2
2
2
2
0
2
0
PU141
PU01
PU11
PU31
PU41
PU51
PU71
1
1
1
1
1
1
1
0
1
PU120
PU140
PU00
PU10
PU30
PU40
PU50
PU70
0
0
0
0
0
0
0
0
Address
FF3CH
FF3EH
FF30H
FF31H
FF33H
FF34H
FF35H
FF37H
After reset
00H
00H
00H
00H
00H
00H
00H
00H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W