UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 181

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

(6) Operation of OVF0n flag
(7) Conflicting operations
<1> The OFV0n flag is also set to 1 in the following case.
<2> Even if the OVF0n flag is cleared before the next count clock is counted (before TM0n becomes 0001H)
When a read period of the 16-bit timer capture/compare register (CR00n/CR01n) and a capture trigger input
(CR00n/CR01n used as capture register) conflict, the priority is given to the capture trigger input. The data read
from CR00n/CR01n is undefined.
When any of the following modes is selected: the mode in which clear & start occurs on a match between
TM0n and CR00n, the mode in which clear & start occurs at the TI00n valid edge, or the free-running mode
TM0n is counted up from FFFFH to 0000H.
after the occurrence of TM0n overflow, the OVF0n flag is re-set newly so this clear is not valid.
Remark n = 0:
CR01n capture value
Capture read signal
TM0n count value
CR00n is set to FFFFH
n = 0, 1: PD78F0133H, 78F0134H, 78F0136H, 78F0138H, 78F0138HD
Count clock
Edge input
INTTM01n
Count clock
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
INTTM00n
Figure 6-42. Capture Register Data Retention Timing
PD78F0132H
OVF0n
CR00n
TM0n
Figure 6-41. Operation Timing of OVF0n Flag
X
N
FFFEH
FFFFH
User’s Manual U16899EJ3V0UD
N + 1
FFFFH
Capture
N + 2
0000H
0001H
N + 2
M
Capture, but
read value is
not guaranteed
M + 1
M + 1
M + 2
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