DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 793

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Bit
6
Bit Name
RDRF
Initial
value
0
R/W
R/(W)* Receive Data Register Full
Description
Indicates that the received data is stored in the
receive data register (SCRDR).
0: Indicates that valid received data is not stored in
[Clearing conditions]
•
•
•
•
1: Indicates that valid received data is stored in
[Setting condition]
•
Note: SCRDR and the RDRF flag are not affected and
SCRDR
SCRDR
By a power-on reset or in standby mode
When 0 is written to RDRF after reading RDRF =
1
When the SCRDR data is read by an RXI interrupt
through the DMAC
When the DTC is activated by an RXI interrupt
and data is transferred from SCRDR while the
DISEL bit of MRB in the DTC is 0
When serial reception ends normally and receive
data is transferred from SCRSR to SCRDR
retain their previous states even if an error is
detected during data reception or if the RE bit in
the serial control register (SCSCR) is cleared to
0. If reception of the next data is completed
while the RDRF flag is still set to 1, an overrun
error will occur and the received data will be
lost.
Section 15 Serial Communication Interface (SCI)
Rev. 3.00 May 17, 2007 Page 735 of 1582
REJ09B0181-0300