DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 423

IC SUPERH MCU FLASH 112LQFP

DF70844AD80FPV

Manufacturer Part Number
DF70844AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70844AD80FPV

Core Size
32-Bit
Program Memory Size
256KB (256K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
16KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70844AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
DF70844AD80FPV
Quantity:
5 000
Note: The minimum numbers of idle cycles in CPU Access are described sequentially for Iφ:Bφ =
CSnBCR
Idle
Setting
4
4
4
4
4
4
4
4
4
4
BSC Register Setting
4:1, 3:1, 2:1, and 1:1.
DMAC and DTC are driven by Bφ. The minimum number of idle cycles is not affected by
changing a clock ratio.
CS3WCR.
WTRP
Setting
2
2
3
3
3
3
4
4
4
4
CS3WCR.
TRWL
Setting
2
3
0
1
2
3
0
1
2
3
Read to
Read
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
Write to
Write
4/4/4/4
4/4/4/4
4/4/4/4
4/4/4/4
4/4/4/4
5/5/5/5
4/4/4/4
4/4/4/4
5/5/5/5
6/6/6/6
CPU Access
Read to
Write
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
5/5/5/5
Rev. 3.00 May 17, 2007 Page 365 of 1582
Section 9 Bus State Controller (BSC)
Write to
Read
4/4/4/4
4/4/4/4
4/4/4/4
4/4/4/4
4/4/4/4
5/5/5/5
4/4/4/4
4/4/4/4
5/5/5/5
6/6/6/6
Read to
Write
5
5
5
5
5
5
5
5
5
5
DMAC or DTC
REJ09B0181-0300
Access
Write to
Read
4
4
4
4
4
5
4
4
5
6

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