DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 458

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 10 Direct Memory Access Controller (DMAC)
Table 10.4 Selecting External Request Detection with DL, DS Bits
Note: Prior to setting CHCR_0 to CHCR_3, select the DREQ pin function by the pin function
When DREQ is accepted, the DREQ pin becomes request accept disabled state. After issuing
acknowledge signal DACK for the accepted DREQ, the DREQ pin again becomes request accept
enabled state.
When DREQ is used by level detection, there are following two cases by the timing to detect the
next DREQ after outputting DACK.
• Overrun 0: Transfer is aborted after the same number of transfer has been performed as
• Overrun 1: Transfer is aborted after transfers have been performed for (the number of requests
The DO bits in CHCR_0 to CHCR_3 select this overrun 0 or overrun 1.
Table 10.5 Selecting External Request Detection with DO Bit
Rev. 3.00 May 17, 2007 Page 400 of 1582
REJ09B0181-0300
DL
0
1
CHCR_0 to CHCR_3
DO
0
1
requests.
plus 1) times.
controller (PFC).
CHCR_0 to CHCR_3
DS
0
1
0
1
External Request
Overrun 0
Overrun 1
Detection of External Request
Low level detection
Falling edge detection
High level detection
Rising edge detection