DF70844AD80FPV Renesas Electronics America, DF70844AD80FPV Datasheet - Page 125

• Manufacturer Part Number: DF70844AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70844AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 256KB (256K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

This LSI has a clock pulse generator (CPG) that generates an internal clock (Iφ), a bus clock (Bφ),
a peripheral clock (Pφ), and clocks (MIφ and MPφ) for the MTU2S and MTU2 modules. The CPG
also controls power-down modes.
4.1
• Five clocks generated independently
• Frequency change function
• Power-down mode control
• Oscillation stop detection
CPGS301C_000020030900
An internal clock (Iφ) for the CPU; a peripheral clock (Pφ) for the on-chip peripheral modules;
a bus clock (Bφ = CK) for the external bus interface; a MTU2S clock (MIφ) for the on-chip
MTU2S module; and a MTU2 clock (MPφ) for the on-chip MTU2 module.
Frequencies of the internal clock (Iφ), bus clock (Bφ), peripheral clock (Pφ), MTU2S clock
(MIφ), and MTU2 clock (MPφ) can be changed independently using the divider circuit within
the CPG. Frequencies are changed by software using the frequency control register (FRQCR)
setting.
The clock can be stopped in sleep mode and standby mode and specific modules can be
stopped using the module standby function.
If the clock supplied through the clock input pin stops for any reason, the timer pins can be
automatically placed in the high-impedance state.
Features
Section 4 Clock Pulse Generator (CPG)
Rev. 3.00 May 17, 2007 Page 67 of 1582
Section 4 Clock Pulse Generator (CPG)
REJ09B0181-0300