C8051F902-GM Silicon Laboratories Inc, C8051F902-GM Datasheet - Page 91

• Manufacturer Part Number: C8051F902-GM
• Description: IC MCU 8BIT 8KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F902-GM

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 24-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 15x10/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 768 B
• Interface Type: UART
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F912DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F90x
• Maximum Speed: 25 MHz
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1848-5

7.5.
The SFRs used to enable and configure the comparators are described in the following register
descriptions. A Comparator must be enabled by setting the CPnEN bit to logic 1 before it can be used.
From an enabled state, a comparator can be disabled and placed in a low power state by clearing the
CPnEN bit to logic 0.
Important Note About Comparator Settings: False rising and falling edges can be detected by the
Comparator while powering on or if changes are made to the hysteresis or response time control bits.
Therefore, it is recommended that the rising-edge and falling-edge flags be explicitly cleared to logic 0 a
short time after the comparator is enabled or its mode bits have been changed. The Comparator Power Up
Time is specified in Section “Table 4.14. Comparator Electrical Characteristics” on page 58.
SFR Definition 7.1. CPT0CN: Comparator 0 Control
SFR Page= 0x0; SFR Address = 0x9B
Name
Reset
Type
3-2
Bit
Bit
1:0
7
6
5
4
Comparator Register Descriptions
CP0HYP[1:0] Comparator0 Positive Hysteresis Control Bits.
CP0HYN[1:0] Comparator0 Negative Hysteresis Control Bits.
CP0EN
CP0OUT
R/W
CP0RIF
CP0FIF
CP0EN
Name
7
0
CP0OUT
Comparator0 Enable Bit.
0: Comparator0 Disabled.
1: Comparator0 Enabled.
Comparator0 Output State Flag.
0: Voltage on CP0+ < CP0–.
1: Voltage on CP0+ > CP0–.
Comparator0 Rising-Edge Flag. Must be cleared by software.
0: No Comparator0 Rising Edge has occurred since this flag was last cleared.
1: Comparator0 Rising Edge has occurred.
Comparator0 Falling-Edge Flag. Must be cleared by software.
0: No Comparator0 Falling-Edge has occurred since this flag was last cleared.
1: Comparator0 Falling-Edge has occurred.
00: Positive Hysteresis Disabled.
01: Positive Hysteresis = Hysteresis 1.
10: Positive Hysteresis = Hysteresis 2.
11: Positive Hysteresis = Hysteresis 3 (Maximum).
00: Negative Hysteresis Disabled.
01: Negative Hysteresis = Hysteresis 1.
10: Negative Hysteresis = Hysteresis 2.
11: Negative Hysteresis = Hysteresis 3 (Maximum).
R
6
0
CP0RIF
R/W
5
0
CP0FIF
R/W
Rev. 1.0
4
0
C8051F91x-C8051F90x
Function
3
CP0HYP[1:0]
0
R/W
2
0
1
CP0HYN[1:0]
0
R/W
0
0
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