C8051F902-GM Silicon Laboratories Inc, C8051F902-GM Datasheet - Page 142

IC MCU 8BIT 8KB FLASH 24QFN

C8051F902-GM

Manufacturer Part Number
C8051F902-GM
Description
IC MCU 8BIT 8KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F902-GM

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 15x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
768 B
Interface Type
UART
Maximum Clock Frequency
25 MHz
Number Of Timers
4
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F912DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Package
24QFN EP
Device Core
8051
Family Name
C8051F90x
Maximum Speed
25 MHz
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1848-5
C8051F91x-C8051F90x
SFR Definition 13.3. FLSCL: Flash Scale
SFR Page = 0x0; SFR Address = 0xB6
SFR Definition 13.4. FLWR: Flash Write Only
SFR Page = 0x0; SFR Address = 0xE5
142
Note: Operations which clear the BYPASS bit do not need to be immediately followed by a benign 3-byte instruction
Name
Reset
Name
Reset
Bit
5:0
Bit
7:0
Type
Type
7
6
Bit
Bit
on C8051F912/11/02/01 devices. For code compatibility with C8051F930/31/20/21 devices, a benign 3-byte
instruction whose third byte is a don't care should follow the clear operation. See the C8051F93x-C8051F92x
data sheet for more details.
FLWR[7:0] Flash Write Only.
Reserved
Reserved
BYPASS
Name
Name
R
7
0
7
0
Reserved. Always Write to 0.
Flash Read Timing One-Shot Bypass.
0: The one-shot determines the Flash read time. This setting should be used for oper-
ating frequencies less than 10 MHz.
1: The system clock determines the Flash read time. This setting should be used for
frequencies greater than 10 MHz.
Reserved. Always Write to 000000.
All writes to this register have no effect on system operation.
BYPASS
R/W
6
0
6
0
R
5
0
5
0
Rev. 1.0
R
4
0
4
0
FLWR[7:0]
W
Function
Function
R
3
0
3
0
R
2
0
2
0
R
1
0
1
0
R
0
0
0
0

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